With the increasing capabilities of modern mobile devices and their corresponding increase in usage, power considerations of mobile devices across various modes of operation can become increasingly important. For example, under certain conditions, the loss of power to the mobile device can result loss of the contents of data stored in volatile memory. Such power losses may result from unintentional power disruptions due to an impact of the mobile device (such as dropping the phone which can disconnect the battery), or a battery which has become depleted due to not receiving a timely recharge. In other situations, a user may intentionally cause a power disruption in order to circumvent security measures, such as, for example, entry pass-codes, identity and/or financial credentials, digital rights management, etc. In the most common situation, a power disruption can occur when a user simply shuts down, or turns off completely, the mobile device. After such a power disruption, the conventional mobile device may have to perform a cold reboot in order to return to normal operation.
FIG. 1 represents a conventional mobile device wherein the power states may be monitored and/or controlled by a Power Management Integrated Circuit (PMIC) 130. Power can be supplied/controlled by the PMIC to a plurality of components within the mobile devices (shown as block 105), including the processor 110, Non-volatile memory (e.g., flash memory) 150 and a Synchronous Dynamic Random Access Memory (SDRAM) 140 during the normal operation of the mobile device, such as, for example, calling and/or responding to an incoming call. The PMIC may further supply, monitor, and/or control power to other subsystems and/or components within the mobile device 100 which are not shown. The processor 110 may include logic for mobile device operation and analog interfaces, and can further include one or more microprocessors and/or Digital Signal Processors (DSPs). SDRAM 140 such as shown in FIG. 1 is a subset of Random Access Memories (RAMs) in general. RAM can be stand alone devices and/or can be integrated or embedded within devices that use the RAM, such as microprocessors, microcontrollers, application specific integrated circuits (ASICs), system-on-chip (SoC), and other like devices.
RAM can be volatile or non-volatile. Volatile RAM loses its stored information whenever power is removed. Non-volatile memory (e.g., flash memory) can maintain its memory contents even when power is removed from the memory. Although flash memory has advantages in the ability to maintain its contents without having power applied, it may have slower read/write times than volatile RAM. Moreover, there may be limitations regarding the number of write operations which can be performed on a flash memory.
When the mobile device performs a cold-reboot (after an intentional or unintentional power disruption as discussed above), repowering the device may typically result in a time-consuming reboot of the processor and other sub-systems in the mobile device. In conventional systems, the processor/system state and other information used in rebooting the mobile device may be stored in flash memory. The reboot process may copy information from the flash memory back into volatile main memory. This process may be slow, in part due to the lack of speed associated with flash memory. Additionally, the reboot sequence can be processor and system intensive, and thus can consume a significant amount of battery power.
Accordingly, given the aforementioned conventional memory configurations, system designers may contend with challenging compromises between mobile device performance, power consumption, security and usability.